Electrical & Electronics

Instrumentation Amplifier Calculator

Calculate gain, choose gain resistors and check internal output voltages.

01

Your inputs

Design components

Ideal three-op-amp model with matched resistor pairs. Limits check outputs only; verify input common-mode in the datasheet. No clipping, bandwidth or load prediction.

02

Your results

Voltage gain
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Ideal output voltage
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Voltage · V+ − V−
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Voltage · VCM
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VA
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VB
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Remaining output margin
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Formula—

Check differential gain and internal amplifier headroom

Model the displayed three-amplifier instrumentation circuit. Calculate differential gain and ideal output while checking internal stage voltages against user-supplied limits. This simplified headroom test does not establish a real device's complete common-mode range.

Step by step

  1. Enter matched stage resistances, both input voltages and the output reference. Use the diagram to distinguish input and output-stage resistor pairs.
  2. Enter supply limits and headroom allowance. For gain design, choose a target and preferred series, then apply the proposed gain resistor.
  3. Compare ideal output, common-mode input and internal outputs. A plausible final output can still accompany an internal limit warning.

Settings and limits

Gain resistor
RG controls first-stage gain. The final stage also multiplies the difference according to its resistor ratio; inspect achieved total gain after rounding.
Reference voltage
Reference shifts ideal output without changing the differential input. It does not move every internal node equally or automatically solve common-mode limitations.
Headroom allowance
The entered allowance reduces the usable rail interval for all checked nodes. Real input and output ranges depend on the device, load and supply.

Worked example

Use the differential-input example below. The final output and both first-stage outputs fit inside the chosen usable interval.

Example input

R = 10 kΩ; RG = 1 kΩ; Rin = Rout = 10 kΩ
Vref = 0 V; V− = −5 V; V+ = 5 V
h = 0.2 V
Expected result
Vin+ / Vin−GVoutVAVBΔVrail
1.01 / 1 V21 V/V0.21 V0.9 V1.11 V3.69 V
4.9 / 4.9 V21 V/V0 V4.9 V4.9 V−0.1 V

Then set both inputs to the equal high value shown. Ideal differential output vanishes, yet the internal nodes exceed the chosen headroom limit.

Questions and troubleshooting

Why is there a warning with a small output?

The first stages respond to input common-mode voltage. They can run out of swing even when subtraction would give a small final output.

Are rounded gains exact?

Preferred RG values give the displayed achieved gain. Resistor tolerances, offset and finite common-mode rejection add errors beyond this nominal model.

Can I use these limits for any instrumentation IC?

No. Consult its input common-mode versus output range and reference requirements. An integrated device need not follow this simplified discrete topology.